SMIC is the largest semiconductor manufacturer in China. For at least two years, it’s been developing its own 5 nm photolithography technology. In early February 2024, the Financial Times reported that the company was close to finalizing its semiconductor manufacturing processes using deep ultraviolet lithography machines.
SMIC aimed to have the technology ready for mass production of 5 nm chips by the end of 2024, but was unable to achieve this goal. If the company had succeeded, it would have likely released these 5 nm chips already.
Additionally, Huawei and other SMIC customers would have probably introduced the first devices equipped with these integrated circuits on the market. In any case, this technology is finally ready.
SMIC Faces a Wafer Yield Problem
Dr. Kim is an expert in integrated circuit manufacturing who has worked at Samsung and is currently conducting research for TSMC in the U.S. According to her, SMIC is set to begin producing 5 nm chips. This is entirely plausible, given that the company is known to have been developing this technology for several years. Moreover, Dr. Kim is a reliable source.
However, Dr. Kim pointed out that the current wafer yield that SMIC has achieved with its 5 nm nodes is less than 30%.
An emerging integration technology typically achieves a yield of around 50% per wafer.
When semiconductor manufacturers produce a chip wafer, some of its cores fail to function correctly. At the onset of a new lithography node, the wafer yield usually shows significant room for improvement. Over time, as engineers refine their integration processes, this yield tends to increase. While a mature lithography process can deliver very high yields for integrated circuit manufacturers, emerging technologies often start with yields around 50%. This means that only about half of the produced chips work properly.
For an integration technology to be cost-effective, its wafer yield needs to be at least 70%. SMIC’s yield of 30% is objectively very poor. The reason for this low figure lies in the manufacturing technique used by the company, known as multiple patterning. SMIC has been using it for over a year and a half to produce 7 nm chips for Huawei and other customers.
This strategy involves transferring the pattern onto the wafer in several passes to enhance the resolution of the lithographic process. While this technique works, the resulting wafer yield can be significantly improved. SMIC engineers have resorted to multiple patterning because U.S. and Dutch sanctions prevent ASML from selling its extreme ultraviolet (EUV) lithography equipment to Chinese customers. This type of lithography is ideally suited for manufacturing chips of 7 nm or smaller.
Given SMIC’s current lithography equipment, achieving optimal wafer yields will be very challenging. As a result, its 5 nm integrated circuits are likely to be scarce and costly. In the end, the resolution of this issue for SMIC, Huawei, and other Chinese semiconductor companies will depend on their ability to develop their own EUV lithography equipment. They’re working on it.
Image | SMIC
View 0 comments